Electronic Design

Scaling The 1T DRAM Cell

One-transistor, one-capacitor (1T-1C) DRAM cells have been commercially implemented since at least 1999. They save die area compared to conventional 6-T DRAM cells, use less power, yield better, and ...
EDN

Swiss team develops single-transistor SOI DRAM cell

TOKYO — Swiss-based Innovative Silicon Solutions (ISS) and the Swiss Federal Institute of Technology have developed a silicon-on-insulator based single-transistor DRAM cell prototype that will scale ...
EDN

MOSFET design simplifies DRAM

Pierre C. Fazan, Innovative Silicon Solutions, Le Landeron, Switzerland, Serguei Okhonin, Mikhail Nagoga, Jean-Michel Sallese, Swiss Federal Institute of Technology, Innovative Silicon Solutions, Le ...
Nature

Dynamic Random Access Memory Technologies

Dynamic random access memory (DRAM) remains a cornerstone of modern electronic systems, enabling rapid data storage and retrieval. Recent developments have focused on capacitorless designs – notably ...
Semiconductor Engineering

Micron D1α, The Most Advanced Node Yet On DRAM

Finally, we got to see D1α DRAM generation! It’s 14nm! After a quick viewing of the Micron D1α die (die markings: Z41C) and its cell design, we have determined its actual technology node (design rule) ...
Electronic Design

Cellular Memory Swaps In The Next Generation

Partners Have Spawned High-Performance, Drop-In-Replacement Memory Chips For 2.5G And 3G Network Applications. Although they have been hyped for many years, high-data-rate cellular networks are now ...